Utilize este identificador para referenciar este registo:
https://hdl.handle.net/1822/71345| Título: | DBTOR: a dynamic binary translation architecture for modern embedded systems |
| Autor(es): | Salgado, Filipe Alexandre Andrade Gomes, Tiago Manuel Ribeiro Cabral, Jorge Monteiro, João L. Tavares, Adriano |
| Palavras-chave: | Computer architectures Condition-code emulation Dynamic binary translation (DBT) Dynamic compilation Embedded systems Instruction-set architecture (ISA) |
| Data: | 2019 |
| Editora: | Institute of Electrical and Electronics Engineers |
| Revista: | Proceedings of the IEEE International Conference on Industrial Technology |
| Resumo(s): | This article describes a dynamic binary translation (DBT) system specially tailored to fit resource-constrained embedded systems, detailing its design decisions and architectural components. Although designed to support a wide range of low-end architectures, to test its feasibility, we present and evaluate two distinct and widely known source and target architectures, commonly used in embedded systems. The performed evaluations demonstrate legacy Intel MCS-51 code running on a modern Arm v7-M architecture (Cortex-M3) and shows the impact of using DBT techniques on resource-constrained devices. |
| Tipo: | Artigo em ata de conferência |
| URI: | https://hdl.handle.net/1822/71345 |
| ISBN: | 9781538663769 |
| e-ISBN: | 978-1-5386-6376-9 |
| DOI: | 10.1109/ICIT.2019.8755145 |
| ISSN: | 2643-2978 |
| Versão da editora: | https://ieeexplore.ieee.org/abstract/document/8755145 |
| Arbitragem científica: | yes |
| Acesso: | Acesso restrito UMinho |
| Aparece nas coleções: |
Ficheiros deste registo:
| Ficheiro | Descrição | Tamanho | Formato | |
|---|---|---|---|---|
| FSalgado_08755145.pdf Acesso restrito! | 176,65 kB | Adobe PDF | Ver/Abrir |
