Utilize este identificador para referenciar este registo:
https://hdl.handle.net/1822/1647
Título: | Wafer-level chip-scale packaging for low-end RF products |
Autor(es): | Bartek, M. Zilmer, G. Teomin, D. Polyakov, A. Sinaga, S. M. Mendes, P. M. Burghartz, J. N. |
Palavras-chave: | Wafer level packaging WLP Chip scale packaging CSP System-on-chip Soc Embedded passives Crosstalk suppression Embedded passives, crosstalk suppression |
Data: | Set-2004 |
Editora: | IEEE |
Citação: | TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, Atlanta, 2004 - "Digest of papers". Piscataway : IEEE, 2004. ISBN 0-7803-8703-1. p. 41-44. |
Resumo(s): | This paper gives a short overview of waferlevel chip-scale packaging technology and analyses its added value in the packaging of RF ICs. Particularly, the possibilities of substrate crosstalk suppression by substrate thinning and trenching together with embedding of rf passives (inductors, antennas) are addressed. The Shellcasetype wafer-level packaging solution is used as a study case presenting its fabrication aspects and its potential for RF IC packaging. |
Tipo: | Artigo em ata de conferência |
URI: | https://hdl.handle.net/1822/1647 |
ISBN: | 0-7803-8703-1 |
Arbitragem científica: | yes |
Acesso: | Acesso aberto |
Aparece nas coleções: | DEI - Artigos em atas de congressos internacionais |
Ficheiros deste registo:
Ficheiro | Descrição | Tamanho | Formato | |
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Atlanta_MB.pdf | 312,08 kB | Adobe PDF | Ver/Abrir |