Processability and electrical characteristics of glass substrates for RF wafer-level chip-scale packages

dc.contributor.authorPolyakov, A.
dc.contributor.authorMendes, P. M.
dc.contributor.authorSinaga, S. M.
dc.contributor.authorBartek, M.
dc.contributor.authorRejaei, B.
dc.contributor.authorCorreia, J. H.
dc.contributor.authorBurghartz, J. N.
dc.date.accessioned2005-06-02T11:05:28Z
dc.date.available2005-06-02T11:05:28Z
dc.date.issued2003-05
dc.description.abstractVarious types of glass substrates have been compared with respect to their suitability as a low-loss substrate in wafer-level chip-scale packaging for RF applications. Processability has been evaluated by fabrication of shallow and deep recesses using wet etching in HF (/H3PO4) solutions. Electrical characteristics (dielectric constant and attenuation) have been extracted from measurements on coplanar wave guides (CPWs) up to 10 GHz. Results show that Coming Pyrex #7740 glass provides optical quality of wet-etched deep recesses, but exhibit about 2 times higher electrical attenuation than Hoya SD-2. Pyrex #7740 and SD-2 are thermally matched to silicon and due to some alkali content, they are suitable for anodic bonding. The relatively high content of AL2O3 (~20%) in SD-2 is favorable for its electrical properties, but makes wet etching of deep recesses more difficult. The non-alkaline AF45, with CTE almost 2 times of Si (CTEAF45=4.5x10-6 k-1), is suitable for adhesive bonding and is difficult to pattern using wet etching. Its electrical attenuation is close to that of SD-2. The measured dielectric constants (at 6 GHz) for SD-2, Pyrex #7740 and AF45 are 4.7,5.9 and 6.1, respectively.
dc.description.sponsorshipFundação para a Ciência e a Tecnologia (FCT), European Comission, Philips Research.por
dc.distributioninternationaleng
dc.identifier.citationELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, 53, New Orleans, 2003 - "Proceedings". New Orleans : IEEE, 2003. ISBN 0-7803-7430-4. p. 875-880.eng
dc.identifier.isbn0-7803-7430-4
dc.identifier.issn0569-5503por
dc.identifier.urihttps://hdl.handle.net/1822/1950
dc.language.isoengeng
dc.peerreviewedyeseng
dc.publisherIEEEeng
dc.rightsopenAccesseng
dc.subjectWafer level packagingeng
dc.subjectWafer bondingeng
dc.subjectGlass wafer processingeng
dc.titleProcessability and electrical characteristics of glass substrates for RF wafer-level chip-scale packageseng
dc.typeconferencePapereng
dspace.entity.typePublicationen
oaire.citationEndPage880por
oaire.citationStartPage875por
sdum.journalProceedings - Electronic Components and Technology Conferencepor

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