Utilize este identificador para referenciar este registo:
https://hdl.handle.net/1822/81642
Título: | Towards a heterogeneous fault-tolerance architecture based on Arm and RISC-V processors |
Autor(es): | Rodrigues, Cristiano António Azevedo Marques, Ivo Cruz Pinto, Sandro Gomes, Tiago Manuel Ribeiro Tavares, Adriano |
Palavras-chave: | Dual-core lockstep Fault tolerance Heterogeneous architectures Field programmable gate array RISC-V Arm |
Data: | Jan-2019 |
Editora: | IEEE |
Revista: | IEEE Industrial Electronics Society |
Citação: | C. Rodrigues, I. Marques, S. Pinto, T. Gomes and A. Tavares, "Towards a Heterogeneous Fault-Tolerance Architecture based on Arm and RISC-V Processors," IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society, 2019, pp. 3112-3117, doi: 10.1109/IECON.2019.8926844. |
Resumo(s): | Computer systems are permanently present in our daily basis in a wide range of applications. In systems with mixed-criticality requirements, e.g., autonomous driving or aerospace applications, devices are expected to continue operating properly even in the event of a failure. An approach to improve the robustness of the device's operation lies in enabling faulttolerant mechanisms during the system's design. This article proposes Lock-V, a heterogeneous architecture that explores a Dual-Core Lockstep (DCLS) fault-tolerance technique in two different processing units: a hard-core Arm Cortex-A9 and a softcore RISC-V-based processor. It resorts a System-on-Chip (SoC) solution with software programmability (available trough the hard-core Arm Cortex-A9) and field-programmable gate array (FPGA) technology, taking advantages from the latter to support the deployment of the RISC-V soft-core along with dedicated hardware accelerators towards the realization of the DCLS. |
Tipo: | Artigo em ata de conferência |
URI: | https://hdl.handle.net/1822/81642 |
ISBN: | 978-1-7281-4878-6 |
DOI: | 10.1109/IECON.2019.8926844 |
ISSN: | 1553-572X |
Versão da editora: | https://ieeexplore.ieee.org/xpl/conhome/8897531/proceeding |
Arbitragem científica: | yes |
Acesso: | Acesso aberto |
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Ficheiros deste registo:
Ficheiro | Descrição | Tamanho | Formato | |
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Towards_a_Heterogeneous_Fault-Tolerance_Architecture_based_on_Arm_and_RISC-V_Processors.pdf | 189,84 kB | Adobe PDF | Ver/Abrir |